#ifndef INCLUDE_DI_FW_DRV_W5500_H_ #define INCLUDE_DI_FW_DRV_W5500_H_ #define W5500_SPI_READ (0x00 << 2) //< SPI interface Read operation in Control Phase #define W5500_SPI_WRITE (0x01 << 2) //< SPI interface Write operation in Control Phase #define W5500_CREG_BLOCK 0x00 //< Common register block #define W5500_SREG_BLOCK(n) (1 + 4 * n) //< Socket n register block #define W5500_TXBUF_BLOCK(n) (2 + 4 * n) //< Socket n Tx buffer address block #define W5500_RXBUF_BLOCK(n) (3 + 4 * n) //< Socket n Rx buffer address block #include di_errno_t di_fw_w5500_init(void); #endif /* INCLUDE_DI_FW_DRV_W5500_H_ */