/** * DNCM RTOS board support * @file board.h * @copyright 2017 Dual Inventive Technology Centre B.V. */ #ifndef INCLUDE_DNCM_BOARD_H_ #define INCLUDE_DNCM_BOARD_H_ /* * Setup for Dual Inventive DNCM board (Main CPU). */ /* * Board identifier. */ #ifndef STM32F407xG #define STM32F407xG #endif /* * Board oscillators-related settings. * NOTE: LSE not fitted. */ #if !defined(STM32_LSECLK) #define STM32_LSECLK 0U #endif #if !defined(STM32_HSECLK) #define STM32_HSECLK 8000000U #endif /* * Board voltages. * Required for performance limits calculation. */ #define STM32_VDD 330U /* * MCU type as defined in the ST header. */ #ifndef STM32F407xx #define STM32F407xx #endif #define DNCM_CONFIG_DEFAULT_TCP_HOST "di-tcp.dualinventive.com" #define DNCM_CONFIG_DEFAULT_TCP_PORT "4030" #define DI_FW_BOARD_DEVICE_TYPE DI_RPC_DNCM_DEVICE_TYPE_LABEL #define DI_FW_BOARD_REV_PORT GPIOE #define DI_FW_BOARD_REV_MASK 0x0f00 #define DI_FW_BOARD_REV_SHIFT 8 // DNCM logging facility // * semihosting // * serial port (with shell) // * sdcard #define DNCM_LOG_FACILITY_SEMIHOSTING 1 #define DNCM_LOG_FACILITY_SERIAL_PORT 2 #define DNCM_LOG_FACILITY_SDCARD 3 #define DNCM_LOG_FACILITY_CANBUS 4 #ifndef DNCM_LOG_FACILITY #define DNCM_LOG_FACILITY DNCM_LOG_FACILITY_SEMIHOSTING #endif #if DNCM_LOG_FACILITY == DNCM_LOG_FACILITY_SERIAL_PORT #define DNCM_SHELL_ENABLED 1 #endif // Board minor version (PD12-14) #define DI_FW_BOARD_VERSION_MINOR_PORT GPIOD #define DI_FW_BOARD_VERSION_MINOR_MASK 0x7000 #define DI_FW_BOARD_VERSION_MINOR_SHIFT 12 #define DNCM_MODEM_BAUD HL854X_BAUDRATE_921K6 #define DNCM_MODEM_DEV SD1 #define DNCM_TCP_RX_POOL_SIZE 1 #define DNCM_TCP_RX_POOL_CHUNK_SIZE 1024 #define DNCM_TCP_TX_POOL_SIZE 10 #define DNCM_TCP_TX_POOL_CHUNK_SIZE 2048 #define MCP9808_I2C_ADDR 0x18 // 0b0011000 #define MCP9808_I2C_DRV I2CD1 /* Libdi DI-Net CAN stack configuration */ #define DI_FW_CAN_DEV CAND1 #define DI_FW_CAN_CFG { \ CAN_MCR_ABOM | CAN_MCR_AWUM | CAN_MCR_TXFP, \ CAN_BTR_SJW(0) | CAN_BTR_TS2(4) | CAN_BTR_TS1(14) | CAN_BTR_BRP(1) } /**< As the DNCM has GPS/TCP time source it should not sync time frames from CAN */ #define DI_FW_CAN_TIMESYNC_DISABLED TRUE #define DI_FW_CAN_RECV_STACK_SIZE 512U #define DI_FW_CAN_RECV_TIMEOUT_MS 10U #define DI_FW_CAN_FRAME_POOL_SIZE 32U #define DI_FW_CAN_MSG_POOL_SIZE 20U #define DI_FW_CAN_MSG_DATA_SIZE 2048U #define DI_CAN_CFG_MSG_TIMEOUT 1000U #define DNCM_CAN_CALLBACKS_STACK_SIZE 1024U #define DI_FW_PERIODIC_MAX_EVENTS 16 #define DI_FW_PERIODIC_STACK_SIZE 2048 #define DI_FW_TIME_DEV GPTD3 #define DI_FW_TIME_GPT_HZ 2000 #define DI_FW_TIME_GPT_DIV 2 #define DI_FW_I2C1_TIMEOUT_MS 250 #define XM1110_USART_DEV SD3 #define XM1110_USART_BAUDRATE 115200 #define DI_FW_SERIAL_DEV SD4 #define DI_FW_SERIAL_BAUDRATE 115200 #define GPIOA_DEBUG_UART_TX 0U #define GPIOA_DEBUG_UART_RX 1U #define GPIOA_DEBUG_UART_DETECT 2U #define GPIOA_PIN3 3U #define GPIOA_GPS_CS 4U #define GPIOA_GPS_SCLK 5U #define GPIOA_GPS_MISO 6U #define GPIOA_GPS_MOSI 7U #define GPIOA_PIN8 8U #define GPIOA_UART_TX 9U #define GPIOA_UART_RX 10U #define GPIOA_UART_CTS 11U #define GPIOA_UART_RTS 12U #define GPIOA_SWDIO 13U #define GPIOA_SWCLK 14U #define GPIOA_PIN15 15U #define GPIOB_LED_RED 0U #define GPIOB_LED_GREEN 1U #define GPIOB_PIN2 2U #define GPIOB_SWO 3U #define GPIOB_PIN4 4U #define GPIOB_PIN5 5U #define GPIOB_THERM_SCL 6U #define GPIOB_THERM_SDA 7U #define GPIOB_PIN8 8U #define GPIOB_PIN9 9U #define GPIOB_GPS_UART_RX 10U #define GPIOB_GPS_UART_TX 11U #define GPIOB_PIN12 12U #define GPIOB_PIN13 13U #define GPIOB_USB_D_P 14U #define GPIOB_USB_D_N 15U #define GPIOC_PIN0 0U #define GPIOC_PIN1 1U #define GPIOC_PIN2 2U #define GPIOC_MODEM_PPS 3U #define GPIOC_GPS_1PPS 4U #define GPIOC_PIN5 5U #define GPIOC_PIN6 6U #define GPIOC_SDIO_CD 7U #define GPIOC_SDIO_D0 8U #define GPIOC_SDIO_D1 9U #define GPIOC_SDIO_D2 10U #define GPIOC_SDIO_D3 11U #define GPIOC_SDIO_CLK 12U #define GPIOC_PIN13 13U #define GPIOC_PIN14 14U #define GPIOC_PIN15 15U #define GPIOD_CANRX1 0U #define GPIOD_CANTX1 1U #define GPIOD_SDIO_CMD 2U #define GPIOD_PIN3 3U #define GPIOD_PIN4 4U #define GPIOD_PIN5 5U #define GPIOD_PIN6 6U #define GPIOD_PIN7 7U #define GPIOD_PIN8 8U #define GPIOD_PIN9 9U #define GPIOD_PIN10 10U #define GPIOD_PIN11 11U #define GPIOD_VERSION_MINOR_0 12U #define GPIOD_VERSION_MINOR_1 13U #define GPIOD_VERSION_MINOR_2 14U #define GPIOD_THERM_ALERT 15U #define GPIOE_PIN0 0U #define GPIOE_MODEM_RESET 1U #define GPIOE_PIN2 2U #define GPIOE_PIN3 3U #define GPIOE_PIN4 4U #define GPIOE_SDCARD_OFF 5U #define GPIOE_PIN6 6U #define GPIOE_PIN7 7U #define GPIOE_VER0 8U #define GPIOE_VER1 9U #define GPIOE_VER2 10U #define GPIOE_VER3 11U #define GPIOE_GPS_NRESET 12U #define GPIOE_PIN13 13U #define GPIOE_PIN14 14U #define GPIOE_PIN15 15U #define GPIOF_PIN0 0U #define GPIOF_PIN1 1U #define GPIOF_PIN2 2U #define GPIOF_PIN3 3U #define GPIOF_PIN4 4U #define GPIOF_PIN5 5U #define GPIOF_PIN6 6U #define GPIOF_PIN7 7U #define GPIOF_PIN8 8U #define GPIOF_PIN9 9U #define GPIOF_PIN10 10U #define GPIOF_PIN11 11U #define GPIOF_PIN12 12U #define GPIOF_PIN13 13U #define GPIOF_PIN14 14U #define GPIOF_PIN15 15U #define GPIOG_PIN0 0U #define GPIOG_PIN1 1U #define GPIOG_PIN2 2U #define GPIOG_PIN3 3U #define GPIOG_PIN4 4U #define GPIOG_PIN5 5U #define GPIOG_PIN6 6U #define GPIOG_PIN7 7U #define GPIOG_PIN8 8U #define GPIOG_PIN9 9U #define GPIOG_PIN10 10U #define GPIOG_PIN11 11U #define GPIOG_PIN12 12U #define GPIOG_PIN13 13U #define GPIOG_PIN14 14U #define GPIOG_PIN15 15U #define GPIOH_OSC_IN 0U #define GPIOH_OSC_OUT 1U #define GPIOH_PIN2 2U #define GPIOH_PIN3 3U #define GPIOH_PIN4 4U #define GPIOH_PIN5 5U #define GPIOH_PIN6 6U #define GPIOH_PIN7 7U #define GPIOH_PIN8 8U #define GPIOH_PIN9 9U #define GPIOH_PIN10 10U #define GPIOH_PIN11 11U #define GPIOH_PIN12 12U #define GPIOH_PIN13 13U #define GPIOH_PIN14 14U #define GPIOH_PIN15 15U #define GPIOI_PIN0 0U #define GPIOI_PIN1 1U #define GPIOI_PIN2 2U #define GPIOI_PIN3 3U #define GPIOI_PIN4 4U #define GPIOI_PIN5 5U #define GPIOI_PIN6 6U #define GPIOI_PIN7 7U #define GPIOI_PIN8 8U #define GPIOI_PIN9 9U #define GPIOI_PIN10 10U #define GPIOI_PIN11 11U #define GPIOI_PIN12 12U #define GPIOI_PIN13 13U #define GPIOI_PIN14 14U #define GPIOI_PIN15 15U /* * I/O ports initial setup, this configuration is established soon after reset * in the initialization code. * Please refer to the STM32 Reference Manual for details. */ #define PIN_MODE_INPUT(n) (0U << ((n) * 2U)) #define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U)) #define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U)) #define PIN_MODE_ANALOG(n) (3U << ((n) * 2U)) #define PIN_ODR_LOW(n) (0U << (n)) #define PIN_ODR_HIGH(n) (1U << (n)) #define PIN_OTYPE_PUSHPULL(n) (0U << (n)) #define PIN_OTYPE_OPENDRAIN(n) (1U << (n)) #define PIN_OSPEED_2M(n) (0U << ((n) * 2U)) #define PIN_OSPEED_25M(n) (1U << ((n) * 2U)) #define PIN_OSPEED_50M(n) (2U << ((n) * 2U)) #define PIN_OSPEED_100M(n) (3U << ((n) * 2U)) #define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U)) #define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U)) #define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U)) #define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U)) #define VAL_GPIOA_MODER (PIN_MODE_ALTERNATE(GPIOA_DEBUG_UART_TX) | \ PIN_MODE_ALTERNATE(GPIOA_DEBUG_UART_RX) | \ PIN_MODE_INPUT(GPIOA_DEBUG_UART_DETECT) | \ PIN_MODE_INPUT(GPIOA_PIN3) | \ PIN_MODE_OUTPUT(GPIOA_GPS_CS) | \ PIN_MODE_INPUT(GPIOA_GPS_SCLK) | \ PIN_MODE_OUTPUT(GPIOA_GPS_MISO) | \ PIN_MODE_INPUT(GPIOA_GPS_MOSI) | \ PIN_MODE_INPUT(GPIOA_PIN8) | \ PIN_MODE_ALTERNATE(GPIOA_UART_TX) | \ PIN_MODE_ALTERNATE(GPIOA_UART_RX) | \ PIN_MODE_ALTERNATE(GPIOA_UART_CTS) | \ PIN_MODE_ALTERNATE(GPIOA_UART_RTS) | \ PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \ PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \ PIN_MODE_INPUT(GPIOA_PIN15)) #define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_DEBUG_UART_TX) | \ PIN_OTYPE_PUSHPULL(GPIOA_DEBUG_UART_RX) | \ PIN_OTYPE_PUSHPULL(GPIOA_DEBUG_UART_DETECT) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOA_GPS_CS) | \ PIN_OTYPE_PUSHPULL(GPIOA_GPS_SCLK) | \ PIN_OTYPE_PUSHPULL(GPIOA_GPS_MISO) | \ PIN_OTYPE_PUSHPULL(GPIOA_GPS_MOSI) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOA_UART_TX) | \ PIN_OTYPE_PUSHPULL(GPIOA_UART_RX) | \ PIN_OTYPE_PUSHPULL(GPIOA_UART_CTS) | \ PIN_OTYPE_PUSHPULL(GPIOA_UART_RTS) | \ PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \ PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \ PIN_OTYPE_PUSHPULL(GPIOA_PIN15)) #define VAL_GPIOA_OSPEEDR (PIN_OSPEED_50M(GPIOA_DEBUG_UART_TX) | \ PIN_OSPEED_50M(GPIOA_DEBUG_UART_RX) | \ PIN_OSPEED_50M(GPIOA_DEBUG_UART_DETECT) | \ PIN_OSPEED_50M(GPIOA_PIN3) | \ PIN_OSPEED_50M(GPIOA_GPS_CS) | \ PIN_OSPEED_50M(GPIOA_GPS_SCLK) | \ PIN_OSPEED_50M(GPIOA_GPS_MISO) | \ PIN_OSPEED_50M(GPIOA_GPS_MOSI) | \ PIN_OSPEED_50M(GPIOA_PIN8) | \ PIN_OSPEED_50M(GPIOA_UART_TX) | \ PIN_OSPEED_50M(GPIOA_UART_RX) | \ PIN_OSPEED_50M(GPIOA_UART_CTS) | \ PIN_OSPEED_50M(GPIOA_UART_RTS) | \ PIN_OSPEED_50M(GPIOA_SWDIO) | \ PIN_OSPEED_50M(GPIOA_SWCLK) | \ PIN_OSPEED_50M(GPIOA_PIN15)) #define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_DEBUG_UART_TX) | \ PIN_PUPDR_FLOATING(GPIOA_DEBUG_UART_RX) | \ PIN_PUPDR_PULLDOWN(GPIOA_DEBUG_UART_DETECT) | \ PIN_PUPDR_PULLUP(GPIOA_PIN3) | \ PIN_PUPDR_PULLUP(GPIOA_GPS_CS) | \ PIN_PUPDR_PULLUP(GPIOA_GPS_SCLK) | \ PIN_PUPDR_PULLUP(GPIOA_GPS_MISO) | \ PIN_PUPDR_PULLUP(GPIOA_GPS_MOSI) | \ PIN_PUPDR_PULLUP(GPIOA_PIN8) | \ PIN_PUPDR_FLOATING(GPIOA_UART_TX) | \ PIN_PUPDR_FLOATING(GPIOA_UART_RX) | \ PIN_PUPDR_FLOATING(GPIOA_UART_CTS) | \ PIN_PUPDR_FLOATING(GPIOA_UART_RTS) | \ PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \ PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \ PIN_PUPDR_PULLUP(GPIOA_PIN15)) #define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_DEBUG_UART_TX) | \ PIN_ODR_HIGH(GPIOA_DEBUG_UART_RX) | \ PIN_ODR_HIGH(GPIOA_DEBUG_UART_DETECT) | \ PIN_ODR_HIGH(GPIOA_PIN3) | \ PIN_ODR_HIGH(GPIOA_GPS_CS) | \ PIN_ODR_HIGH(GPIOA_GPS_SCLK) | \ PIN_ODR_HIGH(GPIOA_GPS_MISO) | \ PIN_ODR_HIGH(GPIOA_GPS_MOSI) | \ PIN_ODR_HIGH(GPIOA_PIN8) | \ PIN_ODR_HIGH(GPIOA_UART_TX) | \ PIN_ODR_HIGH(GPIOA_UART_RX) | \ PIN_ODR_HIGH(GPIOA_UART_CTS) | \ PIN_ODR_HIGH(GPIOA_UART_RTS) | \ PIN_ODR_HIGH(GPIOA_SWDIO) | \ PIN_ODR_HIGH(GPIOA_SWCLK) | \ PIN_ODR_HIGH(GPIOA_PIN15)) #define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_DEBUG_UART_TX, 8) | \ PIN_AFIO_AF(GPIOA_DEBUG_UART_RX, 8) | \ PIN_AFIO_AF(GPIOA_DEBUG_UART_DETECT, 0) | \ PIN_AFIO_AF(GPIOA_PIN3, 0) | \ PIN_AFIO_AF(GPIOA_GPS_CS, 0) | \ PIN_AFIO_AF(GPIOA_GPS_SCLK, 0) | \ PIN_AFIO_AF(GPIOA_GPS_MISO, 0) | \ PIN_AFIO_AF(GPIOA_GPS_MOSI, 0)) #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \ PIN_AFIO_AF(GPIOA_UART_TX, 7) | \ PIN_AFIO_AF(GPIOA_UART_RX, 7) | \ PIN_AFIO_AF(GPIOA_UART_CTS, 7) | \ PIN_AFIO_AF(GPIOA_UART_RTS, 7) | \ PIN_AFIO_AF(GPIOA_SWDIO, 0) | \ PIN_AFIO_AF(GPIOA_SWCLK, 0) | \ PIN_AFIO_AF(GPIOA_PIN15, 0)) #define VAL_GPIOB_MODER (PIN_MODE_OUTPUT(GPIOB_LED_RED) | \ PIN_MODE_OUTPUT(GPIOB_LED_GREEN) | \ PIN_MODE_INPUT(GPIOB_PIN2) | \ PIN_MODE_ALTERNATE(GPIOB_SWO) | \ PIN_MODE_INPUT(GPIOB_PIN4) | \ PIN_MODE_INPUT(GPIOB_PIN5) | \ PIN_MODE_ALTERNATE(GPIOB_THERM_SCL) | \ PIN_MODE_ALTERNATE(GPIOB_THERM_SDA) | \ PIN_MODE_INPUT(GPIOB_PIN8) | \ PIN_MODE_INPUT(GPIOB_PIN9) | \ PIN_MODE_ALTERNATE(GPIOB_GPS_UART_RX) | \ PIN_MODE_ALTERNATE(GPIOB_GPS_UART_TX) | \ PIN_MODE_INPUT(GPIOB_PIN12) | \ PIN_MODE_INPUT(GPIOB_PIN13) | \ PIN_MODE_INPUT(GPIOB_USB_D_P) | \ PIN_MODE_INPUT(GPIOB_USB_D_N)) #define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_LED_RED) | \ PIN_OTYPE_PUSHPULL(GPIOB_LED_GREEN) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \ PIN_OTYPE_OPENDRAIN(GPIOB_THERM_SCL) | \ PIN_OTYPE_OPENDRAIN(GPIOB_THERM_SDA) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOB_GPS_UART_RX) | \ PIN_OTYPE_PUSHPULL(GPIOB_GPS_UART_TX) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOB_USB_D_P) | \ PIN_OTYPE_PUSHPULL(GPIOB_USB_D_N)) #define VAL_GPIOB_OSPEEDR (PIN_OSPEED_50M(GPIOB_LED_RED) | \ PIN_OSPEED_50M(GPIOB_LED_GREEN) | \ PIN_OSPEED_2M(GPIOB_PIN2) | \ PIN_OSPEED_100M(GPIOB_SWO) | \ PIN_OSPEED_2M(GPIOB_PIN4) | \ PIN_OSPEED_2M(GPIOB_PIN5) | \ PIN_OSPEED_100M(GPIOB_THERM_SCL) | \ PIN_OSPEED_100M(GPIOB_THERM_SDA) | \ PIN_OSPEED_2M(GPIOB_PIN8) | \ PIN_OSPEED_2M(GPIOB_PIN9) | \ PIN_OSPEED_50M(GPIOB_GPS_UART_RX) | \ PIN_OSPEED_50M(GPIOB_GPS_UART_TX) | \ PIN_OSPEED_2M(GPIOB_PIN12) | \ PIN_OSPEED_2M(GPIOB_PIN13) | \ PIN_OSPEED_100M(GPIOB_USB_D_P) | \ PIN_OSPEED_100M(GPIOB_USB_D_N)) #define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLDOWN(GPIOB_LED_RED) | \ PIN_PUPDR_PULLDOWN(GPIOB_LED_GREEN) | \ PIN_PUPDR_PULLUP(GPIOB_PIN2) | \ PIN_PUPDR_FLOATING(GPIOB_SWO) | \ PIN_PUPDR_FLOATING(GPIOB_PIN4) | \ PIN_PUPDR_FLOATING(GPIOB_PIN5) | \ PIN_PUPDR_FLOATING(GPIOB_THERM_SCL) | \ PIN_PUPDR_FLOATING(GPIOB_THERM_SDA) | \ PIN_PUPDR_PULLUP(GPIOB_PIN8) | \ PIN_PUPDR_PULLUP(GPIOB_PIN9) | \ PIN_PUPDR_FLOATING(GPIOB_GPS_UART_RX) | \ PIN_PUPDR_FLOATING(GPIOB_GPS_UART_TX) | \ PIN_PUPDR_PULLUP(GPIOB_PIN12) | \ PIN_PUPDR_PULLUP(GPIOB_PIN13) | \ PIN_PUPDR_FLOATING(GPIOB_USB_D_P) | \ PIN_PUPDR_FLOATING(GPIOB_USB_D_N)) #define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_LED_RED) | \ PIN_ODR_HIGH(GPIOB_LED_GREEN) | \ PIN_ODR_HIGH(GPIOB_PIN2) | \ PIN_ODR_HIGH(GPIOB_SWO) | \ PIN_ODR_HIGH(GPIOB_PIN4) | \ PIN_ODR_HIGH(GPIOB_PIN5) | \ PIN_ODR_HIGH(GPIOB_THERM_SCL) | \ PIN_ODR_HIGH(GPIOB_THERM_SDA) | \ PIN_ODR_HIGH(GPIOB_PIN8) | \ PIN_ODR_HIGH(GPIOB_PIN9) | \ PIN_ODR_HIGH(GPIOB_GPS_UART_RX) | \ PIN_ODR_HIGH(GPIOB_GPS_UART_TX) | \ PIN_ODR_LOW(GPIOB_PIN12) | \ PIN_ODR_LOW(GPIOB_PIN13) | \ PIN_ODR_HIGH(GPIOB_USB_D_P) | \ PIN_ODR_HIGH(GPIOB_USB_D_N)) #define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_LED_RED, 0) | \ PIN_AFIO_AF(GPIOB_LED_GREEN, 0) | \ PIN_AFIO_AF(GPIOB_PIN2, 0) | \ PIN_AFIO_AF(GPIOB_SWO, 0) | \ PIN_AFIO_AF(GPIOB_PIN4, 0) | \ PIN_AFIO_AF(GPIOB_PIN5, 5) | \ PIN_AFIO_AF(GPIOB_THERM_SCL, 4) | \ PIN_AFIO_AF(GPIOB_THERM_SDA, 4)) #define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \ PIN_AFIO_AF(GPIOB_PIN9, 0) | \ PIN_AFIO_AF(GPIOB_GPS_UART_RX, 7) | \ PIN_AFIO_AF(GPIOB_GPS_UART_TX, 7) | \ PIN_AFIO_AF(GPIOB_PIN12, 0) | \ PIN_AFIO_AF(GPIOB_PIN13, 0) | \ PIN_AFIO_AF(GPIOB_USB_D_P, 0U) | \ PIN_AFIO_AF(GPIOB_USB_D_N, 0U)) #define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) |\ PIN_MODE_INPUT(GPIOC_PIN1) | \ PIN_MODE_INPUT(GPIOC_PIN2) | \ PIN_MODE_INPUT(GPIOC_MODEM_PPS) | \ PIN_MODE_INPUT(GPIOC_GPS_1PPS) | \ PIN_MODE_INPUT(GPIOC_PIN5) | \ PIN_MODE_INPUT(GPIOC_PIN6) | \ PIN_MODE_ALTERNATE(GPIOC_SDIO_CD) | \ PIN_MODE_ALTERNATE(GPIOC_SDIO_D0) | \ PIN_MODE_ALTERNATE(GPIOC_SDIO_D1) | \ PIN_MODE_ALTERNATE(GPIOC_SDIO_D2) | \ PIN_MODE_ALTERNATE(GPIOC_SDIO_D3) | \ PIN_MODE_ALTERNATE(GPIOC_SDIO_CLK) | \ PIN_MODE_INPUT(GPIOC_PIN13) | \ PIN_MODE_INPUT(GPIOC_PIN14) | \ PIN_MODE_INPUT(GPIOC_PIN15)) #define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) |\ PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOC_MODEM_PPS) | \ PIN_OTYPE_PUSHPULL(GPIOC_GPS_1PPS) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOC_SDIO_CD) | \ PIN_OTYPE_PUSHPULL(GPIOC_SDIO_D0) | \ PIN_OTYPE_PUSHPULL(GPIOC_SDIO_D1) | \ PIN_OTYPE_PUSHPULL(GPIOC_SDIO_D3) | \ PIN_OTYPE_PUSHPULL(GPIOC_SDIO_D2) | \ PIN_OTYPE_PUSHPULL(GPIOC_SDIO_CLK) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOC_PIN15)) #define VAL_GPIOC_OSPEEDR (PIN_OSPEED_2M(GPIOC_PIN0) |\ PIN_OSPEED_2M(GPIOC_PIN1) | \ PIN_OSPEED_2M(GPIOC_PIN2) | \ PIN_OSPEED_100M(GPIOC_MODEM_PPS) | \ PIN_OSPEED_50M(GPIOC_GPS_1PPS) | \ PIN_OSPEED_2M(GPIOC_PIN5) | \ PIN_OSPEED_2M(GPIOC_PIN6) | \ PIN_OSPEED_100M(GPIOC_SDIO_CD) | \ PIN_OSPEED_100M(GPIOC_SDIO_D0) | \ PIN_OSPEED_100M(GPIOC_SDIO_D1) | \ PIN_OSPEED_100M(GPIOC_SDIO_D3) | \ PIN_OSPEED_100M(GPIOC_SDIO_D2) | \ PIN_OSPEED_100M(GPIOC_SDIO_CLK) | \ PIN_OSPEED_2M(GPIOC_PIN13) | \ PIN_OSPEED_2M(GPIOC_PIN14) | \ PIN_OSPEED_2M(GPIOC_PIN15)) #define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) |\ PIN_PUPDR_PULLUP(GPIOC_PIN1) | \ PIN_PUPDR_PULLUP(GPIOC_PIN2) | \ PIN_PUPDR_PULLUP(GPIOC_MODEM_PPS) | \ PIN_PUPDR_PULLUP(GPIOC_GPS_1PPS) | \ PIN_PUPDR_PULLUP(GPIOC_PIN5) | \ PIN_PUPDR_PULLUP(GPIOC_PIN6) | \ PIN_PUPDR_PULLUP(GPIOC_SDIO_CD) | \ PIN_PUPDR_PULLUP(GPIOC_SDIO_D0) | \ PIN_PUPDR_PULLUP(GPIOC_SDIO_D1) | \ PIN_PUPDR_PULLUP(GPIOC_SDIO_D2) | \ PIN_PUPDR_PULLUP(GPIOC_SDIO_D3) | \ PIN_PUPDR_PULLUP(GPIOC_SDIO_CLK) | \ PIN_PUPDR_PULLUP(GPIOC_PIN13) | \ PIN_PUPDR_PULLUP(GPIOC_PIN14) | \ PIN_PUPDR_PULLUP(GPIOC_PIN15)) #define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \ PIN_ODR_HIGH(GPIOC_PIN1) | \ PIN_ODR_HIGH(GPIOC_PIN2) | \ PIN_ODR_HIGH(GPIOC_MODEM_PPS) | \ PIN_ODR_HIGH(GPIOC_GPS_1PPS) | \ PIN_ODR_HIGH(GPIOC_PIN5) | \ PIN_ODR_HIGH(GPIOC_PIN6) | \ PIN_ODR_HIGH(GPIOC_SDIO_CD) | \ PIN_ODR_HIGH(GPIOC_SDIO_D0) | \ PIN_ODR_HIGH(GPIOC_SDIO_D1) | \ PIN_ODR_HIGH(GPIOC_SDIO_D2) | \ PIN_ODR_HIGH(GPIOC_SDIO_D3) | \ PIN_ODR_HIGH(GPIOC_SDIO_CLK) | \ PIN_ODR_HIGH(GPIOC_PIN13) | \ PIN_ODR_HIGH(GPIOC_PIN14) | \ PIN_ODR_HIGH(GPIOC_PIN15)) #define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) |\ PIN_AFIO_AF(GPIOC_PIN1, 0) | \ PIN_AFIO_AF(GPIOC_PIN2, 0) | \ PIN_AFIO_AF(GPIOC_MODEM_PPS, 0) | \ PIN_AFIO_AF(GPIOC_GPS_1PPS, 0) | \ PIN_AFIO_AF(GPIOC_PIN5, 0) | \ PIN_AFIO_AF(GPIOC_PIN6, 0) | \ PIN_AFIO_AF(GPIOC_SDIO_CD, 0)) #define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_SDIO_D0, 12) | \ PIN_AFIO_AF(GPIOC_SDIO_D1, 12) | \ PIN_AFIO_AF(GPIOC_SDIO_D2, 12) | \ PIN_AFIO_AF(GPIOC_SDIO_D3, 12) | \ PIN_AFIO_AF(GPIOC_SDIO_CLK, 12) | \ PIN_AFIO_AF(GPIOC_PIN13, 0) | \ PIN_AFIO_AF(GPIOC_PIN14, 0) | \ PIN_AFIO_AF(GPIOC_PIN15, 0)) #define VAL_GPIOD_MODER (PIN_MODE_ALTERNATE(GPIOD_CANRX1) | \ PIN_MODE_ALTERNATE(GPIOD_CANTX1) | \ PIN_MODE_ALTERNATE(GPIOD_SDIO_CMD) | \ PIN_MODE_INPUT(GPIOD_PIN3) | \ PIN_MODE_INPUT(GPIOD_PIN4) | \ PIN_MODE_INPUT(GPIOD_PIN5) | \ PIN_MODE_INPUT(GPIOD_PIN6) | \ PIN_MODE_INPUT(GPIOD_PIN7) | \ PIN_MODE_INPUT(GPIOD_PIN8) | \ PIN_MODE_INPUT(GPIOD_PIN9) | \ PIN_MODE_INPUT(GPIOD_PIN10) | \ PIN_MODE_INPUT(GPIOD_PIN11) | \ PIN_MODE_INPUT(GPIOD_VERSION_MINOR_0) | \ PIN_MODE_INPUT(GPIOD_VERSION_MINOR_1) | \ PIN_MODE_INPUT(GPIOD_VERSION_MINOR_2) | \ PIN_MODE_INPUT(GPIOD_THERM_ALERT)) #define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_CANRX1) | \ PIN_OTYPE_PUSHPULL(GPIOD_CANTX1) | \ PIN_PUPDR_PULLUP(GPIOD_SDIO_CMD) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN5) |\ PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \ PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOD_VERSION_MINOR_0) | \ PIN_OTYPE_PUSHPULL(GPIOD_VERSION_MINOR_1) | \ PIN_OTYPE_PUSHPULL(GPIOD_VERSION_MINOR_2) | \ PIN_OTYPE_PUSHPULL(GPIOD_THERM_ALERT)) #define VAL_GPIOD_OSPEEDR (PIN_OSPEED_100M(GPIOD_CANRX1) | \ PIN_OSPEED_100M(GPIOD_CANTX1) | \ PIN_OSPEED_100M(GPIOD_SDIO_CMD) | \ PIN_OSPEED_2M(GPIOD_PIN3) | \ PIN_OSPEED_2M(GPIOD_PIN4) | \ PIN_OSPEED_2M(GPIOD_PIN5) | \ PIN_OSPEED_2M(GPIOD_PIN6) | \ PIN_OSPEED_2M(GPIOD_PIN7) | \ PIN_OSPEED_2M(GPIOD_PIN8) | \ PIN_OSPEED_2M(GPIOD_PIN9) | \ PIN_OSPEED_2M(GPIOD_PIN10) | \ PIN_OSPEED_2M(GPIOD_PIN11) | \ PIN_OSPEED_2M(GPIOD_VERSION_MINOR_0) | \ PIN_OSPEED_2M(GPIOD_VERSION_MINOR_1) | \ PIN_OSPEED_2M(GPIOD_VERSION_MINOR_2) | \ PIN_OSPEED_100M(GPIOD_THERM_ALERT)) #define VAL_GPIOD_PUPDR (PIN_PUPDR_FLOATING(GPIOD_CANRX1) | \ PIN_PUPDR_FLOATING(GPIOD_CANTX1) | \ PIN_PUPDR_FLOATING(GPIOD_SDIO_CMD) | \ PIN_PUPDR_PULLUP(GPIOD_PIN3) | \ PIN_PUPDR_PULLUP(GPIOD_PIN4) | \ PIN_PUPDR_PULLUP(GPIOD_PIN5) |\ PIN_PUPDR_PULLUP(GPIOD_PIN6) | \ PIN_PUPDR_PULLUP(GPIOD_PIN7) | \ PIN_PUPDR_PULLUP(GPIOD_PIN8) | \ PIN_PUPDR_PULLUP(GPIOD_PIN9) | \ PIN_PUPDR_PULLUP(GPIOD_PIN10) | \ PIN_PUPDR_PULLUP(GPIOD_PIN11) | \ PIN_PUPDR_PULLDOWN(GPIOD_VERSION_MINOR_0) | \ PIN_PUPDR_PULLDOWN(GPIOD_VERSION_MINOR_1) | \ PIN_PUPDR_PULLDOWN(GPIOD_VERSION_MINOR_2) | \ PIN_PUPDR_PULLUP(GPIOD_THERM_ALERT)) #define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_CANRX1) | \ PIN_ODR_HIGH(GPIOD_CANTX1) | \ PIN_ODR_HIGH(GPIOD_SDIO_CMD) | \ PIN_ODR_HIGH(GPIOD_PIN3) | \ PIN_ODR_HIGH(GPIOD_PIN4) | \ PIN_ODR_HIGH(GPIOD_PIN5) | \ PIN_ODR_HIGH(GPIOD_PIN6) | \ PIN_ODR_HIGH(GPIOD_PIN7) | \ PIN_ODR_HIGH(GPIOD_PIN8) | \ PIN_ODR_HIGH(GPIOD_PIN9) | \ PIN_ODR_HIGH(GPIOD_PIN10) | \ PIN_ODR_HIGH(GPIOD_PIN11) | \ PIN_ODR_LOW(GPIOD_VERSION_MINOR_0) | \ PIN_ODR_LOW(GPIOD_VERSION_MINOR_1) | \ PIN_ODR_LOW(GPIOD_VERSION_MINOR_2) | \ PIN_ODR_HIGH(GPIOD_THERM_ALERT)) #define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_CANRX1, 9) | \ PIN_AFIO_AF(GPIOD_CANTX1, 9) | \ PIN_AFIO_AF(GPIOD_SDIO_CMD, 12) | \ PIN_AFIO_AF(GPIOD_PIN3, 0) | \ PIN_AFIO_AF(GPIOD_PIN4, 0) | \ PIN_AFIO_AF(GPIOD_PIN5, 0) | \ PIN_AFIO_AF(GPIOD_PIN6, 0) | \ PIN_AFIO_AF(GPIOD_PIN7, 0)) #define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \ PIN_AFIO_AF(GPIOD_PIN9, 0) | \ PIN_AFIO_AF(GPIOD_PIN10, 0) | \ PIN_AFIO_AF(GPIOD_PIN11, 0) | \ PIN_AFIO_AF(GPIOD_VERSION_MINOR_0, 0) | \ PIN_AFIO_AF(GPIOD_VERSION_MINOR_1, 0) | \ PIN_AFIO_AF(GPIOD_VERSION_MINOR_2, 0) | \ PIN_AFIO_AF(GPIOD_THERM_ALERT, 0)) #define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \ PIN_MODE_OUTPUT(GPIOE_MODEM_RESET) | \ PIN_MODE_INPUT(GPIOE_PIN2) | \ PIN_MODE_INPUT(GPIOE_PIN3) | \ PIN_MODE_INPUT(GPIOE_PIN4) | \ PIN_MODE_OUTPUT(GPIOE_SDCARD_OFF) | \ PIN_MODE_INPUT(GPIOE_PIN6) | \ PIN_MODE_INPUT(GPIOE_PIN7) | \ PIN_MODE_INPUT(GPIOE_VER0) | \ PIN_MODE_INPUT(GPIOE_VER1) | \ PIN_MODE_INPUT(GPIOE_VER2) | \ PIN_MODE_INPUT(GPIOE_VER3) | \ PIN_MODE_OUTPUT(GPIOE_GPS_NRESET) | \ PIN_MODE_INPUT(GPIOE_PIN13) | \ PIN_MODE_INPUT(GPIOE_PIN14) | \ PIN_MODE_INPUT(GPIOE_PIN15)) #define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOE_MODEM_RESET) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOE_SDCARD_OFF) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOE_VER0) | \ PIN_OTYPE_PUSHPULL(GPIOE_VER1) | \ PIN_OTYPE_PUSHPULL(GPIOE_VER2) | \ PIN_OTYPE_PUSHPULL(GPIOE_VER3) | \ PIN_OTYPE_PUSHPULL(GPIOE_GPS_NRESET) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOE_PIN15)) #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_2M(GPIOE_PIN0) | \ PIN_OSPEED_100M(GPIOE_MODEM_RESET) | \ PIN_OSPEED_2M(GPIOE_PIN2) | \ PIN_OSPEED_2M(GPIOE_PIN3) | \ PIN_OSPEED_2M(GPIOE_PIN4) | \ PIN_OSPEED_100M(GPIOE_SDCARD_OFF) | \ PIN_OSPEED_100M(GPIOE_PIN6) | \ PIN_OSPEED_100M(GPIOE_PIN7) | \ PIN_OSPEED_100M(GPIOE_VER0) | \ PIN_OSPEED_100M(GPIOE_VER1) | \ PIN_OSPEED_100M(GPIOE_VER2) | \ PIN_OSPEED_100M(GPIOE_VER3) | \ PIN_OSPEED_100M(GPIOE_GPS_NRESET) | \ PIN_OSPEED_2M(GPIOE_PIN13) | \ PIN_OSPEED_2M(GPIOE_PIN14) | \ PIN_OSPEED_2M(GPIOE_PIN15)) #define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \ PIN_PUPDR_PULLUP(GPIOE_MODEM_RESET) | \ PIN_PUPDR_PULLUP(GPIOE_PIN2) | \ PIN_PUPDR_PULLUP(GPIOE_PIN3) | \ PIN_PUPDR_PULLUP(GPIOE_PIN4) | \ PIN_PUPDR_PULLUP(GPIOE_SDCARD_OFF) | \ PIN_PUPDR_PULLUP(GPIOE_PIN6) | \ PIN_PUPDR_PULLUP(GPIOE_PIN7) | \ PIN_PUPDR_PULLDOWN(GPIOE_VER0) | \ PIN_PUPDR_PULLDOWN(GPIOE_VER1) | \ PIN_PUPDR_PULLDOWN(GPIOE_VER2) | \ PIN_PUPDR_PULLDOWN(GPIOE_VER3) | \ PIN_PUPDR_PULLUP(GPIOE_GPS_NRESET) | \ PIN_PUPDR_PULLUP(GPIOE_PIN13) | \ PIN_PUPDR_PULLUP(GPIOE_PIN14) | \ PIN_PUPDR_PULLUP(GPIOE_PIN15)) #define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \ PIN_ODR_HIGH(GPIOE_MODEM_RESET) | \ PIN_ODR_HIGH(GPIOE_PIN2) | \ PIN_ODR_HIGH(GPIOE_PIN3) | \ PIN_ODR_HIGH(GPIOE_PIN4) | \ PIN_ODR_HIGH(GPIOE_SDCARD_OFF) | \ PIN_ODR_HIGH(GPIOE_PIN6) | \ PIN_ODR_HIGH(GPIOE_PIN7) | \ PIN_ODR_HIGH(GPIOE_VER0) | \ PIN_ODR_HIGH(GPIOE_VER1) | \ PIN_ODR_HIGH(GPIOE_VER2) | \ PIN_ODR_HIGH(GPIOE_VER3) | \ PIN_ODR_HIGH(GPIOE_GPS_NRESET) | \ PIN_ODR_HIGH(GPIOE_PIN13) | \ PIN_ODR_HIGH(GPIOE_PIN14) | \ PIN_ODR_HIGH(GPIOE_PIN15)) #define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \ PIN_AFIO_AF(GPIOE_MODEM_RESET, 0) | \ PIN_AFIO_AF(GPIOE_PIN2, 0) | \ PIN_AFIO_AF(GPIOE_PIN3, 0) | \ PIN_AFIO_AF(GPIOE_PIN4, 0) | \ PIN_AFIO_AF(GPIOE_SDCARD_OFF, 0) | \ PIN_AFIO_AF(GPIOE_PIN6, 0) | \ PIN_AFIO_AF(GPIOE_PIN7, 0)) #define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_VER0, 0) | \ PIN_AFIO_AF(GPIOE_VER1, 0) | \ PIN_AFIO_AF(GPIOE_VER2, 0) | \ PIN_AFIO_AF(GPIOE_VER3, 0) | \ PIN_AFIO_AF(GPIOE_GPS_NRESET, 0) | \ PIN_AFIO_AF(GPIOE_PIN13, 0) | \ PIN_AFIO_AF(GPIOE_PIN14, 0) | \ PIN_AFIO_AF(GPIOE_PIN15, 0)) /* * GPIOF setup: * * PF0 - PIN0 (input floating). * PF1 - PIN1 (input floating). * PF2 - PIN2 (input floating). * PF3 - PIN3 (input floating). * PF4 - PIN4 (input floating). * PF5 - PIN5 (input floating). * PF6 - PIN6 (input floating). * PF7 - PIN7 (input floating). * PF8 - PIN8 (input floating). * PF9 - PIN9 (input floating). * PF10 - PIN10 (input floating). * PF11 - PIN11 (input floating). * PF12 - PIN12 (input floating). * PF13 - PIN13 (input floating). * PF14 - PIN14 (input floating). * PF15 - PIN15 (input floating). */ #define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_PIN0) | \ PIN_MODE_INPUT(GPIOF_PIN1) | \ PIN_MODE_INPUT(GPIOF_PIN2) | \ PIN_MODE_INPUT(GPIOF_PIN3) | \ PIN_MODE_INPUT(GPIOF_PIN4) | \ PIN_MODE_INPUT(GPIOF_PIN5) | \ PIN_MODE_INPUT(GPIOF_PIN6) | \ PIN_MODE_INPUT(GPIOF_PIN7) | \ PIN_MODE_INPUT(GPIOF_PIN8) | \ PIN_MODE_INPUT(GPIOF_PIN9) | \ PIN_MODE_INPUT(GPIOF_PIN10) | \ PIN_MODE_INPUT(GPIOF_PIN11) | \ PIN_MODE_INPUT(GPIOF_PIN12) | \ PIN_MODE_INPUT(GPIOF_PIN13) | \ PIN_MODE_INPUT(GPIOF_PIN14) | \ PIN_MODE_INPUT(GPIOF_PIN15)) #define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOF_PIN15)) #define VAL_GPIOF_OSPEEDR (PIN_OSPEED_100M(GPIOF_PIN0) | \ PIN_OSPEED_100M(GPIOF_PIN1) | \ PIN_OSPEED_100M(GPIOF_PIN2) | \ PIN_OSPEED_100M(GPIOF_PIN3) | \ PIN_OSPEED_100M(GPIOF_PIN4) | \ PIN_OSPEED_100M(GPIOF_PIN5) | \ PIN_OSPEED_100M(GPIOF_PIN6) | \ PIN_OSPEED_100M(GPIOF_PIN7) | \ PIN_OSPEED_100M(GPIOF_PIN8) | \ PIN_OSPEED_100M(GPIOF_PIN9) | \ PIN_OSPEED_100M(GPIOF_PIN10) | \ PIN_OSPEED_100M(GPIOF_PIN11) | \ PIN_OSPEED_100M(GPIOF_PIN12) | \ PIN_OSPEED_100M(GPIOF_PIN13) | \ PIN_OSPEED_100M(GPIOF_PIN14) | \ PIN_OSPEED_100M(GPIOF_PIN15)) #define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_PIN0) | \ PIN_PUPDR_FLOATING(GPIOF_PIN1) | \ PIN_PUPDR_FLOATING(GPIOF_PIN2) | \ PIN_PUPDR_FLOATING(GPIOF_PIN3) | \ PIN_PUPDR_FLOATING(GPIOF_PIN4) | \ PIN_PUPDR_FLOATING(GPIOF_PIN5) | \ PIN_PUPDR_FLOATING(GPIOF_PIN6) | \ PIN_PUPDR_FLOATING(GPIOF_PIN7) | \ PIN_PUPDR_FLOATING(GPIOF_PIN8) | \ PIN_PUPDR_FLOATING(GPIOF_PIN9) | \ PIN_PUPDR_FLOATING(GPIOF_PIN10) | \ PIN_PUPDR_FLOATING(GPIOF_PIN11) | \ PIN_PUPDR_FLOATING(GPIOF_PIN12) | \ PIN_PUPDR_FLOATING(GPIOF_PIN13) | \ PIN_PUPDR_FLOATING(GPIOF_PIN14) | \ PIN_PUPDR_FLOATING(GPIOF_PIN15)) #define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_PIN0) | \ PIN_ODR_HIGH(GPIOF_PIN1) | \ PIN_ODR_HIGH(GPIOF_PIN2) | \ PIN_ODR_HIGH(GPIOF_PIN3) | \ PIN_ODR_HIGH(GPIOF_PIN4) | \ PIN_ODR_HIGH(GPIOF_PIN5) | \ PIN_ODR_HIGH(GPIOF_PIN6) | \ PIN_ODR_HIGH(GPIOF_PIN7) | \ PIN_ODR_HIGH(GPIOF_PIN8) | \ PIN_ODR_HIGH(GPIOF_PIN9) | \ PIN_ODR_HIGH(GPIOF_PIN10) | \ PIN_ODR_HIGH(GPIOF_PIN11) | \ PIN_ODR_HIGH(GPIOF_PIN12) | \ PIN_ODR_HIGH(GPIOF_PIN13) | \ PIN_ODR_HIGH(GPIOF_PIN14) | \ PIN_ODR_HIGH(GPIOF_PIN15)) #define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_PIN0, 0) | \ PIN_AFIO_AF(GPIOF_PIN1, 0) | \ PIN_AFIO_AF(GPIOF_PIN2, 0) | \ PIN_AFIO_AF(GPIOF_PIN3, 0) | \ PIN_AFIO_AF(GPIOF_PIN4, 0) | \ PIN_AFIO_AF(GPIOF_PIN5, 0) | \ PIN_AFIO_AF(GPIOF_PIN6, 0) | \ PIN_AFIO_AF(GPIOF_PIN7, 0)) #define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \ PIN_AFIO_AF(GPIOF_PIN9, 0) | \ PIN_AFIO_AF(GPIOF_PIN10, 0) | \ PIN_AFIO_AF(GPIOF_PIN11, 0) | \ PIN_AFIO_AF(GPIOF_PIN12, 0) | \ PIN_AFIO_AF(GPIOF_PIN13, 0) | \ PIN_AFIO_AF(GPIOF_PIN14, 0) | \ PIN_AFIO_AF(GPIOF_PIN15, 0)) /* * GPIOG setup: * * PG0 - PIN0 (input floating). * PG1 - PIN1 (input floating). * PG2 - PIN2 (input floating). * PG3 - PIN3 (input floating). * PG4 - PIN4 (input floating). * PG5 - PIN5 (input floating). * PG6 - PIN6 (input floating). * PG7 - PIN7 (input floating). * PG8 - PIN8 (input floating). * PG9 - PIN9 (input floating). * PG10 - PIN10 (input floating). * PG11 - PIN11 (input floating). * PG12 - PIN12 (input floating). * PG13 - PIN13 (input floating). * PG14 - PIN14 (input floating). * PG15 - PIN15 (input floating). */ #define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \ PIN_MODE_INPUT(GPIOG_PIN1) | \ PIN_MODE_INPUT(GPIOG_PIN2) | \ PIN_MODE_INPUT(GPIOG_PIN3) | \ PIN_MODE_INPUT(GPIOG_PIN4) | \ PIN_MODE_INPUT(GPIOG_PIN5) | \ PIN_MODE_INPUT(GPIOG_PIN6) | \ PIN_MODE_INPUT(GPIOG_PIN7) | \ PIN_MODE_INPUT(GPIOG_PIN8) | \ PIN_MODE_INPUT(GPIOG_PIN9) | \ PIN_MODE_INPUT(GPIOG_PIN10) | \ PIN_MODE_INPUT(GPIOG_PIN11) | \ PIN_MODE_INPUT(GPIOG_PIN12) | \ PIN_MODE_INPUT(GPIOG_PIN13) | \ PIN_MODE_INPUT(GPIOG_PIN14) | \ PIN_MODE_INPUT(GPIOG_PIN15)) #define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOG_PIN15)) #define VAL_GPIOG_OSPEEDR (PIN_OSPEED_100M(GPIOG_PIN0) | \ PIN_OSPEED_100M(GPIOG_PIN1) | \ PIN_OSPEED_100M(GPIOG_PIN2) | \ PIN_OSPEED_100M(GPIOG_PIN3) | \ PIN_OSPEED_100M(GPIOG_PIN4) | \ PIN_OSPEED_100M(GPIOG_PIN5) | \ PIN_OSPEED_100M(GPIOG_PIN6) | \ PIN_OSPEED_100M(GPIOG_PIN7) | \ PIN_OSPEED_100M(GPIOG_PIN8) | \ PIN_OSPEED_100M(GPIOG_PIN9) | \ PIN_OSPEED_100M(GPIOG_PIN10) | \ PIN_OSPEED_100M(GPIOG_PIN11) | \ PIN_OSPEED_100M(GPIOG_PIN12) | \ PIN_OSPEED_100M(GPIOG_PIN13) | \ PIN_OSPEED_100M(GPIOG_PIN14) | \ PIN_OSPEED_100M(GPIOG_PIN15)) #define VAL_GPIOG_PUPDR (PIN_PUPDR_FLOATING(GPIOG_PIN0) | \ PIN_PUPDR_FLOATING(GPIOG_PIN1) | \ PIN_PUPDR_FLOATING(GPIOG_PIN2) | \ PIN_PUPDR_FLOATING(GPIOG_PIN3) | \ PIN_PUPDR_FLOATING(GPIOG_PIN4) | \ PIN_PUPDR_FLOATING(GPIOG_PIN5) | \ PIN_PUPDR_FLOATING(GPIOG_PIN6) | \ PIN_PUPDR_FLOATING(GPIOG_PIN7) | \ PIN_PUPDR_FLOATING(GPIOG_PIN8) | \ PIN_PUPDR_FLOATING(GPIOG_PIN9) | \ PIN_PUPDR_FLOATING(GPIOG_PIN10) | \ PIN_PUPDR_FLOATING(GPIOG_PIN11) | \ PIN_PUPDR_FLOATING(GPIOG_PIN12) | \ PIN_PUPDR_FLOATING(GPIOG_PIN13) | \ PIN_PUPDR_FLOATING(GPIOG_PIN14) | \ PIN_PUPDR_FLOATING(GPIOG_PIN15)) #define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \ PIN_ODR_HIGH(GPIOG_PIN1) | \ PIN_ODR_HIGH(GPIOG_PIN2) | \ PIN_ODR_HIGH(GPIOG_PIN3) | \ PIN_ODR_HIGH(GPIOG_PIN4) | \ PIN_ODR_HIGH(GPIOG_PIN5) | \ PIN_ODR_HIGH(GPIOG_PIN6) | \ PIN_ODR_HIGH(GPIOG_PIN7) | \ PIN_ODR_HIGH(GPIOG_PIN8) | \ PIN_ODR_HIGH(GPIOG_PIN9) | \ PIN_ODR_HIGH(GPIOG_PIN10) | \ PIN_ODR_HIGH(GPIOG_PIN11) | \ PIN_ODR_HIGH(GPIOG_PIN12) | \ PIN_ODR_HIGH(GPIOG_PIN13) | \ PIN_ODR_HIGH(GPIOG_PIN14) | \ PIN_ODR_HIGH(GPIOG_PIN15)) #define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \ PIN_AFIO_AF(GPIOG_PIN1, 0) | \ PIN_AFIO_AF(GPIOG_PIN2, 0) | \ PIN_AFIO_AF(GPIOG_PIN3, 0) | \ PIN_AFIO_AF(GPIOG_PIN4, 0) | \ PIN_AFIO_AF(GPIOG_PIN5, 0) | \ PIN_AFIO_AF(GPIOG_PIN6, 0) | \ PIN_AFIO_AF(GPIOG_PIN7, 0)) #define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \ PIN_AFIO_AF(GPIOG_PIN9, 0) | \ PIN_AFIO_AF(GPIOG_PIN10, 0) | \ PIN_AFIO_AF(GPIOG_PIN11, 0) | \ PIN_AFIO_AF(GPIOG_PIN12, 0) | \ PIN_AFIO_AF(GPIOG_PIN13, 0) | \ PIN_AFIO_AF(GPIOG_PIN14, 0) | \ PIN_AFIO_AF(GPIOG_PIN15, 0)) /* * GPIOH setup: * * PH0 - OSC_IN (input floating). * PH1 - OSC_OUT (input floating). * PH2 - PIN2 (input floating). * PH3 - PIN3 (input floating). * PH4 - PIN4 (input floating). * PH5 - PIN5 (input floating). * PH6 - PIN6 (input floating). * PH7 - PIN7 (input floating). * PH8 - PIN8 (input floating). * PH9 - PIN9 (input floating). * PH10 - PIN10 (input floating). * PH11 - PIN11 (input floating). * PH12 - PIN12 (input floating). * PH13 - PIN13 (input floating). * PH14 - PIN14 (input floating). * PH15 - PIN15 (input floating). */ #define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \ PIN_MODE_INPUT(GPIOH_OSC_OUT) | \ PIN_MODE_INPUT(GPIOH_PIN2) | \ PIN_MODE_INPUT(GPIOH_PIN3) | \ PIN_MODE_INPUT(GPIOH_PIN4) | \ PIN_MODE_INPUT(GPIOH_PIN5) | \ PIN_MODE_INPUT(GPIOH_PIN6) | \ PIN_MODE_INPUT(GPIOH_PIN7) | \ PIN_MODE_INPUT(GPIOH_PIN8) | \ PIN_MODE_INPUT(GPIOH_PIN9) | \ PIN_MODE_INPUT(GPIOH_PIN10) | \ PIN_MODE_INPUT(GPIOH_PIN11) | \ PIN_MODE_INPUT(GPIOH_PIN12) | \ PIN_MODE_INPUT(GPIOH_PIN13) | \ PIN_MODE_INPUT(GPIOH_PIN14) | \ PIN_MODE_INPUT(GPIOH_PIN15)) #define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \ PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOH_PIN15)) #define VAL_GPIOH_OSPEEDR (PIN_OSPEED_100M(GPIOH_OSC_IN) | \ PIN_OSPEED_100M(GPIOH_OSC_OUT) | \ PIN_OSPEED_100M(GPIOH_PIN2) | \ PIN_OSPEED_100M(GPIOH_PIN3) | \ PIN_OSPEED_100M(GPIOH_PIN4) | \ PIN_OSPEED_100M(GPIOH_PIN5) | \ PIN_OSPEED_100M(GPIOH_PIN6) | \ PIN_OSPEED_100M(GPIOH_PIN7) | \ PIN_OSPEED_100M(GPIOH_PIN8) | \ PIN_OSPEED_100M(GPIOH_PIN9) | \ PIN_OSPEED_100M(GPIOH_PIN10) | \ PIN_OSPEED_100M(GPIOH_PIN11) | \ PIN_OSPEED_100M(GPIOH_PIN12) | \ PIN_OSPEED_100M(GPIOH_PIN13) | \ PIN_OSPEED_100M(GPIOH_PIN14) | \ PIN_OSPEED_100M(GPIOH_PIN15)) #define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \ PIN_PUPDR_FLOATING(GPIOH_OSC_OUT) | \ PIN_PUPDR_FLOATING(GPIOH_PIN2) | \ PIN_PUPDR_FLOATING(GPIOH_PIN3) | \ PIN_PUPDR_FLOATING(GPIOH_PIN4) | \ PIN_PUPDR_FLOATING(GPIOH_PIN5) | \ PIN_PUPDR_FLOATING(GPIOH_PIN6) | \ PIN_PUPDR_FLOATING(GPIOH_PIN7) | \ PIN_PUPDR_FLOATING(GPIOH_PIN8) | \ PIN_PUPDR_FLOATING(GPIOH_PIN9) | \ PIN_PUPDR_FLOATING(GPIOH_PIN10) | \ PIN_PUPDR_FLOATING(GPIOH_PIN11) | \ PIN_PUPDR_FLOATING(GPIOH_PIN12) | \ PIN_PUPDR_FLOATING(GPIOH_PIN13) | \ PIN_PUPDR_FLOATING(GPIOH_PIN14) | \ PIN_PUPDR_FLOATING(GPIOH_PIN15)) #define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \ PIN_ODR_HIGH(GPIOH_OSC_OUT) | \ PIN_ODR_HIGH(GPIOH_PIN2) | \ PIN_ODR_HIGH(GPIOH_PIN3) | \ PIN_ODR_HIGH(GPIOH_PIN4) | \ PIN_ODR_HIGH(GPIOH_PIN5) | \ PIN_ODR_HIGH(GPIOH_PIN6) | \ PIN_ODR_HIGH(GPIOH_PIN7) | \ PIN_ODR_HIGH(GPIOH_PIN8) | \ PIN_ODR_HIGH(GPIOH_PIN9) | \ PIN_ODR_HIGH(GPIOH_PIN10) | \ PIN_ODR_HIGH(GPIOH_PIN11) | \ PIN_ODR_HIGH(GPIOH_PIN12) | \ PIN_ODR_HIGH(GPIOH_PIN13) | \ PIN_ODR_HIGH(GPIOH_PIN14) | \ PIN_ODR_HIGH(GPIOH_PIN15)) #define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0) | \ PIN_AFIO_AF(GPIOH_OSC_OUT, 0) | \ PIN_AFIO_AF(GPIOH_PIN2, 0) | \ PIN_AFIO_AF(GPIOH_PIN3, 0) | \ PIN_AFIO_AF(GPIOH_PIN4, 0) | \ PIN_AFIO_AF(GPIOH_PIN5, 0) | \ PIN_AFIO_AF(GPIOH_PIN6, 0) | \ PIN_AFIO_AF(GPIOH_PIN7, 0)) #define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \ PIN_AFIO_AF(GPIOH_PIN9, 0) | \ PIN_AFIO_AF(GPIOH_PIN10, 0) | \ PIN_AFIO_AF(GPIOH_PIN11, 0) | \ PIN_AFIO_AF(GPIOH_PIN12, 0) | \ PIN_AFIO_AF(GPIOH_PIN13, 0) | \ PIN_AFIO_AF(GPIOH_PIN14, 0) | \ PIN_AFIO_AF(GPIOH_PIN15, 0)) /* * GPIOI setup: * * PI0 - PIN0 (input floating). * PI1 - PIN1 (input floating). * PI2 - PIN2 (input floating). * PI3 - PIN3 (input floating). * PI4 - PIN4 (input floating). * PI5 - PIN5 (input floating). * PI6 - PIN6 (input floating). * PI7 - PIN7 (input floating). * PI8 - PIN8 (input floating). * PI9 - PIN9 (input floating). * PI10 - PIN10 (input floating). * PI11 - PIN11 (input floating). * PI12 - PIN12 (input floating). * PI13 - PIN13 (input floating). * PI14 - PIN14 (input floating). * PI15 - PIN15 (input floating). */ #define VAL_GPIOI_MODER (PIN_MODE_INPUT(GPIOI_PIN0) | \ PIN_MODE_INPUT(GPIOI_PIN1) | \ PIN_MODE_INPUT(GPIOI_PIN2) | \ PIN_MODE_INPUT(GPIOI_PIN3) | \ PIN_MODE_INPUT(GPIOI_PIN4) | \ PIN_MODE_INPUT(GPIOI_PIN5) | \ PIN_MODE_INPUT(GPIOI_PIN6) | \ PIN_MODE_INPUT(GPIOI_PIN7) | \ PIN_MODE_INPUT(GPIOI_PIN8) | \ PIN_MODE_INPUT(GPIOI_PIN9) | \ PIN_MODE_INPUT(GPIOI_PIN10) | \ PIN_MODE_INPUT(GPIOI_PIN11) | \ PIN_MODE_INPUT(GPIOI_PIN12) | \ PIN_MODE_INPUT(GPIOI_PIN13) | \ PIN_MODE_INPUT(GPIOI_PIN14) | \ PIN_MODE_INPUT(GPIOI_PIN15)) #define VAL_GPIOI_OTYPER (PIN_OTYPE_PUSHPULL(GPIOI_PIN0) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN1) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN2) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN3) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN4) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN5) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN6) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN7) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN8) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN9) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN10) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN11) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN12) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN13) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN14) | \ PIN_OTYPE_PUSHPULL(GPIOI_PIN15)) #define VAL_GPIOI_OSPEEDR (PIN_OSPEED_100M(GPIOI_PIN0) | \ PIN_OSPEED_100M(GPIOI_PIN1) | \ PIN_OSPEED_100M(GPIOI_PIN2) | \ PIN_OSPEED_100M(GPIOI_PIN3) | \ PIN_OSPEED_100M(GPIOI_PIN4) | \ PIN_OSPEED_100M(GPIOI_PIN5) | \ PIN_OSPEED_100M(GPIOI_PIN6) | \ PIN_OSPEED_100M(GPIOI_PIN7) | \ PIN_OSPEED_100M(GPIOI_PIN8) | \ PIN_OSPEED_100M(GPIOI_PIN9) | \ PIN_OSPEED_100M(GPIOI_PIN10) | \ PIN_OSPEED_100M(GPIOI_PIN11) | \ PIN_OSPEED_100M(GPIOI_PIN12) | \ PIN_OSPEED_100M(GPIOI_PIN13) | \ PIN_OSPEED_100M(GPIOI_PIN14) | \ PIN_OSPEED_100M(GPIOI_PIN15)) #define VAL_GPIOI_PUPDR (PIN_PUPDR_FLOATING(GPIOI_PIN0) | \ PIN_PUPDR_FLOATING(GPIOI_PIN1) | \ PIN_PUPDR_FLOATING(GPIOI_PIN2) | \ PIN_PUPDR_FLOATING(GPIOI_PIN3) | \ PIN_PUPDR_FLOATING(GPIOI_PIN4) | \ PIN_PUPDR_FLOATING(GPIOI_PIN5) | \ PIN_PUPDR_FLOATING(GPIOI_PIN6) | \ PIN_PUPDR_FLOATING(GPIOI_PIN7) | \ PIN_PUPDR_FLOATING(GPIOI_PIN8) | \ PIN_PUPDR_FLOATING(GPIOI_PIN9) | \ PIN_PUPDR_FLOATING(GPIOI_PIN10) | \ PIN_PUPDR_FLOATING(GPIOI_PIN11) | \ PIN_PUPDR_FLOATING(GPIOI_PIN12) | \ PIN_PUPDR_FLOATING(GPIOI_PIN13) | \ PIN_PUPDR_FLOATING(GPIOI_PIN14) | \ PIN_PUPDR_FLOATING(GPIOI_PIN15)) #define VAL_GPIOI_ODR (PIN_ODR_HIGH(GPIOI_PIN0) | \ PIN_ODR_HIGH(GPIOI_PIN1) | \ PIN_ODR_HIGH(GPIOI_PIN2) | \ PIN_ODR_HIGH(GPIOI_PIN3) | \ PIN_ODR_HIGH(GPIOI_PIN4) | \ PIN_ODR_HIGH(GPIOI_PIN5) | \ PIN_ODR_HIGH(GPIOI_PIN6) | \ PIN_ODR_HIGH(GPIOI_PIN7) | \ PIN_ODR_HIGH(GPIOI_PIN8) | \ PIN_ODR_HIGH(GPIOI_PIN9) | \ PIN_ODR_HIGH(GPIOI_PIN10) | \ PIN_ODR_HIGH(GPIOI_PIN11) | \ PIN_ODR_HIGH(GPIOI_PIN12) | \ PIN_ODR_HIGH(GPIOI_PIN13) | \ PIN_ODR_HIGH(GPIOI_PIN14) | \ PIN_ODR_HIGH(GPIOI_PIN15)) #define VAL_GPIOI_AFRL (PIN_AFIO_AF(GPIOI_PIN0, 0) | \ PIN_AFIO_AF(GPIOI_PIN1, 0) | \ PIN_AFIO_AF(GPIOI_PIN2, 0) | \ PIN_AFIO_AF(GPIOI_PIN3, 0) | \ PIN_AFIO_AF(GPIOI_PIN4, 0) | \ PIN_AFIO_AF(GPIOI_PIN5, 0) | \ PIN_AFIO_AF(GPIOI_PIN6, 0) | \ PIN_AFIO_AF(GPIOI_PIN7, 0)) #define VAL_GPIOI_AFRH (PIN_AFIO_AF(GPIOI_PIN8, 0) | \ PIN_AFIO_AF(GPIOI_PIN9, 0) | \ PIN_AFIO_AF(GPIOI_PIN10, 0) | \ PIN_AFIO_AF(GPIOI_PIN11, 0) | \ PIN_AFIO_AF(GPIOI_PIN12, 0) | \ PIN_AFIO_AF(GPIOI_PIN13, 0) | \ PIN_AFIO_AF(GPIOI_PIN14, 0) | \ PIN_AFIO_AF(GPIOI_PIN15, 0)) #if !defined(_FROM_ASM_) #ifdef __cplusplus extern "C" { #endif void dncmSysHalt(const char *reason); void boardInit(void); #ifdef __cplusplus } #endif #endif /* _FROM_ASM_ */ #endif /* INCLUDE_DNCM_BOARD_H_ */